1. Technical Field
The present invention relates to a current mode controlled power converter.
2. Related Art
A current mode controlled power converter essentially includes slope compensation means for preventing subharmonic oscillation and needs an external slope circuit to implement the slope compensation means.
An example of technique used in a known DC-DC converter as disclosed in Japanese Patent Application Laid-Open Publication No. 2011-101479 is intended to implement slope compensation upon dynamic changes in output voltage while allowing for stable operation with low power consumption and high efficiency. This DC-DC converter includes an output voltage setting register for storing a voltage setting value corresponding to a target output voltage value, and a slope compensation circuit which generates a slope compensation signal having a slope compensation amount corresponding to the stored voltage setting value.
The DC-DC converter disclosed in Japanese Patent Application Laid-Open Publication No. 2011-101479 eliminates an analog circuit that feedbacks an output voltage by providing the output voltage setting register, but includes a slope compensation circuit in place of the analog circuit. The slope compensation circuit receives a slope compensation amount reference voltage from a slope compensation DAC and a periodic signal from an oscillation circuit to generate a slope compensation signal having a sawtooth wave shape. Implementation of such an analog slope compensation value calculation circuit will inevitably lead to an increase of number of components, which may increase not only manufacturing costs, but also converter dimensions.
A digital slope calculation circuit would be able to overcome the above disadvantages, where the slope compensation is digitally processed in a microcomputer. Digitally processing the slope compensation in the microcomputer will, however, lead to an updating delay such that the timing of updating a current instruction is delayed by a calculation time required to calculate the current instruction. In the presence of such an updating delay, an on time corresponding to a duty ratio of a pulse signal less than the calculation time will disable voltage control. Therefore, only with digitally processing of the slope compensation in the microcomputer, there is another disadvantage that the on time has to be greater than the calculation time. Although a microcomputer operable at high frequencies is able to reduce the on time, the on time will still have to be greater than the calculation time, which leads to still another disadvantage that the microcomputer becomes more expensive.
Load variations and the like may cause a current reference signal (Iref) to change at time t65 as shown in FIG. 12, where a slope compensation signal calculated previous to a control cycle of time t65 to time t69 may remain, for example, at time t66, which gives rise to a further disadvantage that the voltage control is disabled until completion of the calculation and the DC-DC converter may malfunction at an improper duty ratio.
In consideration of the foregoing, it would therefore be desirable to have a power converter controllable in a digitally processing current mode even during an on time and able to reduce manufacturing costs and converter dimensions.